<?xml version="1.0"?>
<regset>
<vendor>NVIDIA</vendor>
<description>This file describes registers found in nvidia hardware as far as
I've been able to determine from header files in the open-source "nv" 2d driver,
the utah-glx nvidia driver, and the nvsdk that was publically available at one
point. --Eric Anholt
</description>

<cardclass name="NV03">
	<description>RIVA</description>
</cardclass>
<cardclass name="NV04">
	<description>RIVA TNT</description>
</cardclass>
<cardclass name="NV05">
	<description>RIVA TNT2</description>
</cardclass>
<cardclass name="NV10">
	<description>GeForce 256</description>
</cardclass>
<cardclass name="NV15">
	<description>GeForce2</description>
</cardclass>
<cardclass name="NV20">
	<description>GeForce3</description>
</cardclass>

<defaultclass>NV04,NV05,NV10,NV15,NV20</defaultclass>

<regrange name="PGRAPH" type="mmio" offset="0x00400000" length="0x00002000"/>
<regrange name="FIFO" type="mmio" offset="0x00800000" length="0x00010000"/>

<!-- nv driver, riva_dma.h -->
<reg offset="0x00000300" name="SURFACE_FORMAT" group="DMA">
	<bitfield range="0:3">
		<value name="SURFACE_FORMAT_DEPTH8">0x00000001</value>
		<value name="SURFACE_FORMAT_DEPTH15">0x00000002</value>
		<value name="SURFACE_FORMAT_DEPTH16">0x00000004</value>
		<value name="SURFACE_FORMAT_DEPTH24">0x00000006</value>
	</bitfield>
</reg>

<reg offset="0x00000304" name="SURFACE_PITCH" group="DMA">
	<bitfield name="SURFACE_PITCH_SRC" range="0:15"/>
	<bitfield name="SURFACE_PITCH_DST" range="16:31"/>
</reg>

<reg offset="0x00000308" name="SURFACE_OFFSET_SRC" group="DMA"/>

<reg offset="0x0000030c" name="SURFACE_OFFSET_DST" group="DMA"/>

<reg offset="0x00002300" name="ROP_SET" group="DMA"/>

<reg offset="0x00004300" name="PATTERN_FORMAT" group="DMA">
	<bitfield range="0:2">
		<value name="PATTERN_FORMAT_DEPTH8">0x00000003</value>
		<value name="PATTERN_FORMAT_DEPTH16">0x00000001</value>
		<value name="PATTERN_FORMAT_DEPTH24">0x00000003</value>
	</bitfield>
</reg>

<reg offset="0x00004310" name="PATTERN_COLOR_0" group="DMA"/>

<reg offset="0x00004314" name="PATTERN_COLOR_1" group="DMA"/>

<reg offset="0x00004318" name="PATTERN_PATTERN_0" group="DMA"/>

<reg offset="0x0000431c" name="PATTERN_PATTERN_1" group="DMA"/>

<reg offset="0x00006300" name="CLIP_POINT" group="DMA">
	<bitfield name="CLIP_POINT_X" range="0:15"/>
	<bitfield name="CLIP_POINT_Y" range="16:31"/>
</reg>

<reg offset="0x00006304" name="CLIP_SIZE" group="DMA">
	<bitfield name="CLIP_SIZE_WIDTH" range="0:15"/>
	<bitfield name="CLIP_SIZE_HEIGHT" range="16:30"/>
	<description>CLIP_SIZE is the width/height of the clip area, with the
	maximum (disabled) being 0x7fff7fff</description>
</reg>

<reg offset="0x00008300" name="LINE_FORMAT" group="DMA">
	<bitfield range="0:2">
	<value name="LINE_FORMAT_DEPTH8">0x00000003</value>
	<value name="LINE_FORMAT_DEPTH16">0x00000001</value>
	<value name="LINE_FORMAT_DEPTH24">0x00000003</value>
	</bitfield>
</reg>

<reg offset="0x00008304" name="LINE_COLOR" group="DMA"/>

<regseries offset="0x00008400" name="LINE_#N_#POINT0" group="DMA">
	<count>16</count>
	<skip>0x00000008</skip>
	<bitfield name="LINE_#N_#POINT0_X" range="0:15"/>
	<bitfield name="LINE_#N_#POINT0_Y" range="16:31"/>
</regseries>

<regseries offset="0x00008404" name="LINE_#N_#POINT1" group="DMA">
	<count>16</count>
	<skip>0x00000008</skip>
	<bitfield name="LINE_#N_#POINT1_X" range="0:15"/>
	<bitfield name="LINE_#N_#POINT1_Y" range="16:31"/>
</regseries>

<reg offset="0x0000a300" name="BLIT_POINT_SRC" group="DMA">
	<bitfield name="BLIT_POINT_SRC_X" range="0:15"/>
	<bitfield name="BLIT_POINT_SRC_Y" range="16:31"/>
</reg>

	<reg offset="0x0000a304" name="BLIT_POINT_DST" group="DMA">
	<bitfield name="BLIT_POINT_DST_X" range="0:15"/>
	<bitfield name="BLIT_POINT_DST_Y" range="16:31"/>
</reg>

<reg offset="0x0000a300" name="BLIT_SIZE" group="DMA">
	<bitfield name="BLIT_SIZE_WIDTH" range="0:15"/>
	<bitfield name="BLIT_SIZE_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000c300" name="RECT_FORMAT" group="DMA">
	<bitfield range="0:2">
		<value name="RECT_FORMAT_DEPTH8">0x00000003</value>
		<value name="RECT_FORMAT_DEPTH16">0x00000001</value>
		<value name="RECT_FORMAT_DEPTH24">0x00000003</value>
	</bitfield>
</reg>

<reg offset="0x0000c3fc" name="RECT_SOLID_COLOR" group="DMA"/>

<regseries offset="0x0000c400" name="RECT_#N_#POINT" group="DMA">
	<count>32</count>
	<skip>0x00000008</skip>
	<bitfield name="LINE_#N_#POINT0_Y" range="0:15"/>
	<bitfield name="LINE_#N_#POINT0_X" range="16:31"/>
</regseries>

<regseries offset="0x0000c404" name="RECT_#N_#SIZE" group="DMA">
	<count>32</count>
	<skip>0x00000008</skip>
	<bitfield name="RECT_#N_#HEIGHT" range="0:15"/>
	<bitfield name="RECT_#N_#WIDTH" range="16:31"/>
</regseries>

<reg offset="0x0000c7ec" name="RECT_EXPAND_ONE_COLOR_CLIP_POINT0" group="DMA">
	<bitfield name="RECT_EXPAND_ONE_COLOR_CLIP_POINT0_X" range="0:15"/>
	<bitfield name="RECT_EXPAND_ONE_COLOR_CLIP_POINT0_Y" range="16:31"/>
</reg>

<reg offset="0x0000c7f0" name="RECT_EXPAND_ONE_COLOR_CLIP_POINT1" group="DMA">
	<bitfield name="RECT_EXPAND_ONE_COLOR_CLIP_POINT1_X" range="0:15"/>
	<bitfield name="RECT_EXPAND_ONE_COLOR_CLIP_POINT1_Y" range="16:31"/>
</reg>

<reg offset="0x0000c7f4" name="RECT_EXPAND_ONE_COLOR_COLOR" group="DMA"/>

<reg offset="0x0000c7f8" name="RECT_EXPAND_ONE_COLOR_SIZE" group="DMA">
	<bitfield name="RECT_EXPAND_ONE_COLOR_WIDTH" range="0:15"/>
	<bitfield name="RECT_EXPAND_ONE_COLOR_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000c7ec" name="RECT_EXPAND_ONE_COLOR_POINT" group="DMA">
	<bitfield name="RECT_EXPAND_ONE_COLOR_POINT_X" range="0:15"/>
	<bitfield name="RECT_EXPAND_ONE_COLOR_POINT_Y" range="16:31"/>
</reg>

<regseries offset="0x0000c800" name="RECT_EXPAND_ONE_COLOR_POINT_DATA#N#" group="DMA">
	<count name="RECT_EXPAND_ONE_COLOR_POINT_DATA">128</count>
	<skip>0x00000004</skip>
</regseries>

<reg offset="0x0000cbe4" name="RECT_EXPAND_TWO_COLOR_CLIP_POINT0" group="DMA">
	<bitfield name="RECT_EXPAND_TWO_COLOR_CLIP_POINT0_X" range="0:15"/>
	<bitfield name="RECT_EXPAND_TWO_COLOR_CLIP_POINT0_Y" range="16:31"/>
</reg>

<reg offset="0x0000cbe8" name="RECT_EXPAND_TWO_COLOR_CLIP_POINT1" group="DMA">
	<bitfield name="RECT_EXPAND_TWO_COLOR_CLIP_POINT1_X" range="0:15"/>
	<bitfield name="RECT_EXPAND_TWO_COLOR_CLIP_POINT1_Y" range="16:31"/>
</reg>

<reg offset="0x0000cbec" name="RECT_EXPAND_TWO_COLOR_COLOR_0"/>

<reg offset="0x0000cbf0" name="RECT_EXPAND_TWO_COLOR_COLOR_1"/>

<reg offset="0x0000cbf4" name="RECT_EXPAND_TWO_COLOR_SIZE_IN" group="DMA">
	<bitfield name="RECT_EXPAND_TWO_COLOR_SIZE_IN_WIDTH" range="0:15"/>
	<bitfield name="RECT_EXPAND_TWO_COLOR_SIZE_IN_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000cbf8" name="RECT_EXPAND_TWO_COLOR_SIZE_OUT" group="DMA">
	<bitfield name="RECT_EXPAND_TWO_COLOR_SIZE_OUT_WIDTH" range="0:15"/>
	<bitfield name="RECT_EXPAND_TWO_COLOR_SIZE_OUT_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000cbfc" name="RECT_EXPAND_TWO_COLOR_POINT" group="DMA">
	<bitfield name="RECT_EXPAND_TWO_COLOR_POINT_X" range="0:15"/>
	<bitfield name="RECT_EXPAND_TWO_COLOR_POINT_Y" range="16:31"/>
</reg>

<regseries offset="0x0000cc00" name="RECT_EXPAND_TWO_COLOR_POINT_DATA#N#" group="DMA">
	<count name="RECT_EXPAND_TWO_COLOR_POINT_DATACOUNT">128</count>
	<skip>0x00000004</skip>
</regseries>

<reg offset="0x0000e300" name="STRETCH_BLIT_FORMAT" group="DMA">
	<bitfield range="0:3">
	<value name="STRETCH_BLIT_FORMAT_DEPTH8">0x00000004</value>
	<value name="STRETCH_BLIT_FORMAT_DEPTH16">0x00000007</value>
	<value name="STRETCH_BLIT_FORMAT_DEPTH24">0x00000004</value>
	<value name="STRETCH_BLIT_FORMAT_A8R8G8B8">0x00000003</value>
	<value name="STRETCH_BLIT_FORMAT_X8R8G8B8">0x00000004</value>
	<value name="STRETCH_BLIT_FORMAT_YUYV">0x00000005</value>
	<value name="STRETCH_BLIT_FORMAT_UYVY">0x00000006</value>
	</bitfield>
</reg>

<reg offset="0x0000e304" name="STRETCH_BLIT_OPERATION" group="DMA">
	<bitfield range="0:1">
	<value name="STRETCH_BLIT_OPERATION_ROP">0x00000001</value>
	<value name="STRETCH_BLIT_OPERATION_BLEND">0x00000002</value>
	<value name="STRETCH_BLIT_OPERATION_COPY">0x00000003</value>
	</bitfield>
</reg>

<reg offset="0x0000e308" name="STRETCH_BLIT_CLIP_POINT" group="DMA">
	<bitfield name="STRETCH_BLIT_CLIP_POINT_X" range="0:15"/>
	<bitfield name="STRETCH_BLIT_CLIP_POINT_Y" range="16:31"/>
</reg>

<reg offset="0x0000e30c" name="STRETCH_BLIT_CLIP_SIZE" group="DMA">
	<bitfield name="STRETCH_BLIT_CLIP_SIZE_WIDTH" range="0:15"/>
	<bitfield name="STRETCH_BLIT_CLIP_SIZE_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000e310" name="STRETCH_BLIT_DST_POINT" group="DMA">
	<bitfield name="STRETCH_BLIT_DST_POINT_X" range="0:15"/>
	<bitfield name="STRETCH_BLIT_DST_POINT_Y" range="16:31"/>
</reg>

<reg offset="0x0000e314" name="STRETCH_BLIT_DST_SIZE" group="DMA">
	<bitfield name="STRETCH_BLIT_DST_SIZE_WIDTH" range="0:15"/>
	<bitfield name="STRETCH_BLIT_DST_SIZE_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000e318" name="STRETCH_BLIT_DU_DX" group="DMA"/>

<reg offset="0x0000e31c" name="STRETCH_BLIT_DV_DY" group="DMA"/>

<reg offset="0x0000e400" name="STRETCH_BLIT_SRC_SIZE" group="DMA">
	<bitfield name="STRETCH_BLIT_SRC_SIZE_WIDTH" range="0:15"/>
	<bitfield name="STRETCH_BLIT_SRC_SIZE_HEIGHT" range="16:31"/>
</reg>

<reg offset="0x0000e404" name="STRETCH_BLIT_SRC_FORMAT" group="DMA">
<bitfield name="SRC_FORMAT_PITCH" range="0:15"/>
<bitfield name="SRC_FORMAT_ORIGIN" range="16:23">
<!-- From nv_dma.h
<value name="STRETCH_BLIT_SRC_FORMAT_ORIGIN_CENTER">0x00000001</value>
<value name="STRETCH_BLIT_SRC_FORMAT_ORIGIN_CORNER">0x00000002</value>
-->
</bitfield>
<bitfield name="SRC_FORMAT_FILTER" range="24:31">
<!-- From nv_dma.h
<value name="STRETCH_BLIT_SRC_FORMAT_FILTER_POINT_SAMPLE">0x00000000</value>
<value name="STRETCH_BLIT_SRC_FORMAT_FILTER_BILINEAR">0x00000001</value>
-->
</bitfield>
</reg>

<reg offset="0x0000e408" name="STRETCH_BLIT_SRC_OFFSET" group="DMA"/>

<reg offset="0x0000e40c" name="STRETCH_BLIT_SRC_POINT" group="DMA">
<bitfield name="STRETCH_BLIT_SRC_POINT_U" range="0:15"/>
<bitfield name="STRETCH_BLIT_SRC_POINT_V" range="16:31"/>
</reg>

<!-- At this point, the values come from riva_hw.h in nv driver, as used by
utah-glx -->
<reg offset="0x00000300" name="ROP_ROP3" group="FIFO"/>

<reg offset="0x00002300" name="CLIP_POINT" group="FIFO"/>

<reg offset="0x00002304" name="CLIP_SIZE" group="FIFO"/>

<reg offset="0x00004308" name="PATTERN_SHAPE" group="FIFO"/>

<reg offset="0x00004310" name="PATTERN_COLOR0" group="FIFO"/>

<reg offset="0x00004310" name="PATTERN_COLOR1" group="FIFO"/>

<reg offset="0x00006304" name="PIXMAP_POINT_SRC" group="FIFO"/>

<reg offset="0x00006308" name="PIXMAP_POINT_DST" group="FIFO"/>

<reg offset="0x00006308" name="PIXMAP_SIZE" group="FIFO"/>

<reg offset="0x0000630c" name="PIXMAP_SIZE_IN" group="FIFO"/>

<reg offset="0x00006400" name="PIXMAP_PIXELS" group="FIFO"/>

<reg offset="0x00008300" name="SCREENBLT_POINT_SRC" group="FIFO"/>

<reg offset="0x00008304" name="SCREENBLT_POINT_DST" group="FIFO"/>

<reg offset="0x00008308" name="SCREENBLT_SIZE" group="FIFO"/>

<reg offset="0x0000a3fc" name="BITMAP_COLOR1A" group="FIFO"/>

<regseries offset="0x0000a400" name="BITMAP_UNCLIPPEDRECT_POINT#N#" group="FIFO">
	<count name="BITMAP_CLIPPEDRECT_COUNT">64</count>
	<skip>0x00000008</skip>
</regseries>

<regseries offset="0x0000a404" name="BITMAP_UNCLIPPEDRECT_SIZE#N#" group="FIFO">
	<count name="BITMAP_CLIPPEDRECT_COUNT">64</count>
	<skip>0x00000008</skip>
</regseries>

<reg offset="0x0000a7f4" name="BITMAP_COLOR1B" group="FIFO"/>

<reg offset="0x0000a7f8" name="BITMAP_CLIPB_POINT" group="FIFO"/>

<reg offset="0x0000a7fc" name="BITMAP_CLIPB_SIZE" group="FIFO"/>

<regseries offset="0x0000a800" name="BITMAP_CLIPPEDRECT_POINT#N#" group="FIFO">
	<count name="BITMAP_CLIPPEDRECT_COUNT">64</count>
	<skip>0x00000008</skip>
</regseries>

<regseries offset="0x0000a804" name="BITMAP_CLIPPEDRECT_SIZE#N#" group="FIFO">
	<count name="BITMAP_CLIPPEDRECT_COUNT">64</count>
	<skip>0x00000008</skip>
</regseries>

<reg offset="0x0000a9ec" name="BITMAP_CLIPC_POINT" group="FIFO"/>

<reg offset="0x0000a9f0" name="BITMAP_CLIPC_SIZE" group="FIFO"/>

<reg offset="0x0000a9f4" name="BITMAP_COLOR1C" group="FIFO"/>

<reg offset="0x0000a9f8" name="BITMAP_SIZEC" group="FIFO"/>

<reg offset="0x0000a9fc" name="BITMAP_POINTC" group="FIFO"/>

<reg offset="0x0000aa00" name="BITMAP_MONOCHROMEDATA1C" group="FIFO"/>

<reg offset="0x0000ade4" name="BITMAP_CLIPD_POINT" group="FIFO"/>

<reg offset="0x0000ade8" name="BITMAP_CLIPD_SIZE" group="FIFO"/>

<reg offset="0x0000adec" name="BITMAP_COLOR1D" group="FIFO"/>

<reg offset="0x0000adf4" name="BITMAP_SIZE_IN_D" group="FIFO"/>

<reg offset="0x0000adf8" name="BITMAP_SIZE_OUT_D" group="FIFO"/>

<reg offset="0x0000adfc" name="BITMAP_POINTD" group="FIFO"/>

<reg offset="0x0000ae00" name="BITMAP_MONOCHROMEDATA1D" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_CLIPE_POINT" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_CLIPE_SIZE" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_COLOR0E" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_COLOR1E" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_SIZE_IN_E" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_SIZE_OUT_E" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_POINTE" group="FIFO"/>

<reg offset="0x0000b1e0" name="BITMAP_MONOCHROMEDATA1E" group="FIFO"/>

<reg offset="0x0000c304" name="LINE_COLOR" group="FIFO"/>

<regseries offset="0x0000c400" name="LINE_LIN_#N#_POINT0" group="FIFO">
	<count name="LINE_LIN_COUNT">16</count>
	<skip>0x00000008</skip>
	<bitfield name="LINE_LIN_POINT0_X" range="0:15"/>
	<bitfield name="LINE_LIN_POINT0_Y" range="16:32"/>
</regseries>

<regseries offset="0x0000c404" name="LINE_LIN_#N#_POINT1" group="FIFO">
	<count name="LINE_LIN_COUNT">16</count>
	<skip>0x00000008</skip>
	<bitfield name="LINE_LIN_POINT1_X" range="0:15"/>
	<bitfield name="LINE_LIN_POINT1_Y" range="16:32"/>
</regseries>

<regseries offset="0x0000c480" name="LINE_LIN32_#N#_POINT0_X" group="FIFO">
	<count name="LINE_LIN32_COUNT">8</count>
	<skip>0x00000010</skip>
</regseries>

<regseries offset="0x0000c484" name="LINE_LIN32_#N#_POINT0_Y" group="FIFO">
	<count name="LINE_LIN32_COUNT">8</count>
	<skip>0x00000010</skip>
</regseries>

<regseries offset="0x0000c480" name="LINE_LIN32_#N#_POINT1_X" group="FIFO">
	<count name="LINE_LIN32_COUNT">8</count>
	<skip>0x00000010</skip>
</regseries>

<regseries offset="0x0000c484" name="LINE_LIN32_#N#_POINT1_Y" group="FIFO">
	<count name="LINE_LIN32_COUNT">8</count>
	<skip>0x00000010</skip>
</regseries>

<regseries offset="0x0000c500" name="LINE_POLYLIN_#N#_POINT" group="FIFO">
	<count name="LINE_POLYLIN_COUNT">32</count>
	<bitfield name="LINE_LIN_POINT1_X" range="0:15"/>
	<bitfield name="LINE_LIN_POINT1_Y" range="16:32"/>
</regseries>

<regseries offset="0x0000c580" name="LINE_POLYLIN32_#N#_POINT_X" group="FIFO">
	<count name="LINE_POLYLIN32_COUNT">16</count>
	<skip>0x00000008</skip>
</regseries>

<regseries offset="0x0000c584" name="LINE_POLYLIN32_#N#_POINT_Y" group="FIFO">
	<count name="LINE_POLYLIN32_COUNT">16</count>
	<skip>0x00000008</skip>
</regseries>

<regseries offset="0x0000c600" name="LINE_COLORPOLYLIN_#N#_COLOR" group="FIFO">
	<count name="LINE_COLORPOLYLIN_COUNT">16</count>
	<skip>0x00000008</skip>
</regseries>

<regseries offset="0x0000c604" name="LINE_COLORPOLYLIN_#N#_POINT" group="FIFO">
	<count name="LINE_COLORPOLYLIN_COUNT">16</count>
	<bitfield name="LINE_LIN_POINT1_X" range="0:15"/>
	<bitfield name="LINE_LIN_POINT1_Y" range="16:32"/>
	<skip>0x00000008</skip>
</regseries>

<reg offset="0x0000e304" name="TRI_TEXTURE_OFFSET" group="FIFO" class="NV03"/>

<reg offset="0x0000e308" name="TRI_TEXTURE_FORMAT" group="FIFO" class="NV03">
	<bitfield name="TRI_MIPMAP_MAX_LEVEL" range="12:15"/>
	<bitfield name="TRI_WRAP_S" range="20:23">
		<value name="TRI_FORMAT_ARGB1555">0x00000000</value>
		<value name="TRI_FORMAT_XRGB1555">0x00100000</value>
		<value name="TRI_FORMAT_ARGB4444">0x00200000</value>
		<value name="TRI_FORMAT_RGB565">0x00300000</value>
	</bitfield>
	<bitfield name="TRI_TEXTURE_MIN_SIZE" range="24:27">
		<description>log2 of the texture minimum width/height.  Textures
		must be square.  Minimum of 4x4 (value = 0x2)?
		</description>
	</bitfield>
	<bitfield name="TRI_TEXTURE_HEIGHT" range="28:31">
		<description>log2 of the texture maximim width/height.  Textures
		must be square.  Minimum of 4x4 (value = 0x2)?
		</description>
	</bitfield>
</reg>

<reg offset="0x0000e30c" name="TRI_TEXTURE_FILTER" group="FIFO" class="NV03"/>

<reg offset="0x0000e310" name="TRI_FOG_COLOR" group="FIFO" class="NV03">
	<bitfield name="TRI_COLOR_A" range="24:31"/>
	<bitfield name="TRI_COLOR_R" range="16:23"/>
	<bitfield name="TRI_COLOR_G" range="8:15"/>
	<bitfield name="TRI_COLOR_B" range="0:7"/>
</reg>

<reg offset="0x0000e314" name="TRI_CONTROL" group="FIFO" class="NV03">
	<bitfield name="INTERPOLATOR" range="3:0">
		<value name="INTERPOLATOR_ZOH_CORNER">0x00000000</value>
		<value name="INTERPOLATOR_ZOH_CENTER">0x00000001</value>
		<value name="INTERPOLATOR_FOH_CENTER">0x00000002</value>
		<description>Not clear on what this does, but in utah-glx,
		FOH_CENTER is used for the MAG_FILTER_LINEAR case.
		</description>
	</bitfield>
	<bitfield name="WRAP_S" range="4:5">
		<value name="TRI_WRAP_S_CYL">0x00000000</value>
		<value name="TRI_WRAP_S_WRAP">0x00000010</value>
		<value name="TRI_WRAP_S_MIRROR">0x00000020</value>
		<value name="TRI_WRAP_S_CLAMP">0x00000030</value>
	</bitfield>
	<bitfield name="WRAP_T" range="6:7">
		<value name="TRI_WRAP_T_CYL">0x00000000</value>
		<value name="TRI_WRAP_T_WRAP">0x00000040</value>
		<value name="TRI_WRAP_T_MIRROR">0x00000080</value>
		<value name="TRI_WRAP_T_CLAMP">0x000000c0</value>
	</bitfield>
	<bitfield name="SOURCE_COLOR" range="11:8">
		<value name="SOURCE_COLOR_NORMAL">0x00000100</value>
		<value name="SOURCE_COLOR_COLOR_INVERSE">0x00000200</value>
		<value name="SOURCE_COLOR_ALPHA_INVERSE">0x00000300</value>
		<value name="SOURCE_COLOR_ALPHA_ONE">0x00000600</value>
	</bitfield>
	<bitfield name="CULLING" range="12:14">
		<value name="SOURCE_CULLING_NONE">0x00001000</value>
		<value name="SOURCE_CULLING_CCW">0x00002000</value>
		<value name="SOURCE_CULLING_CW">0x00003000</value>
	</bitfield>
	<bitfield name="Z_PERSPECTIVE_ENABLE" range="15:15"/>
	<bitfield name="ZFUNC" range="16:19">
		<value name="ZFUNC_NEVER">0x00010000</value>
		<value name="ZFUNC_LT">0x00020000</value>
		<value name="ZFUNC_EQ">0x00030000</value>
		<value name="ZFUNC_LE">0x00040000</value>
		<value name="ZFUNC_GT">0x00050000</value>
		<value name="ZFUNC_NE">0x00060000</value>
		<value name="ZFUNC_GE">0x00070000</value>
		<value name="ZFUNC_ALWAYS">0x00080000</value>
	</bitfield>
	<bitfield name="DEPTH_WRITE_ENABLE" range="20:20"/>
	<bitfield name="COLOR_WRITE_ENABLE" range="24:24"/>
	<bitfield name="ROP" range="27:28">
		<value name="TRI_ROP_BLEND">0x00000000</value>
		<value name="TRI_ROP_ADD">0x01000000</value>
	</bitfield>
	<bitfield name="BETA" range="29:29">
		<value name="BETA_SRCALPHA">0x00000000</value>
		<value name="BETA_DESTCOLOR">0x02000000</value>
	</bitfield>
	<bitfield name="DEST_BLEND" range="30:30">
		<value name="DEST_BLEND_INVBETA">0x00000000</value>
		<value name="DEST_BLEND_ZERO">0x02000000</value>
	</bitfield>
	<bitfield name="SRC_BLEND" range="31:31">
		<value name="DEST_BLEND_BETA">0x00000000</value>
		<value name="DEST_BLEND_ZERO">0x02000000</value>
	</bitfield>
</reg>

<reg offset="0x0000e318" name="TRI_ALPHA_TEST" group="FIFO" class="NV03">
	<bitfield name="TRI_ALPHA_COMPARE" range="8:15">
	<!-- dubious? -->
		<value name="TRI_ALPHA_COMPARE_NEVER">0x00000100</value>
		<value name="TRI_ALPHA_COMPARE_LT">0x00000200</value>
		<value name="TRI_ALPHA_COMPARE_EQ">0x00000300</value>
		<value name="TRI_ALPHA_COMPARE_LE">0x00000400</value>
		<value name="TRI_ALPHA_COMPARE_GT">0x00000500</value>
		<value name="TRI_ALPHA_COMPARE_NE">0x00000600</value>
		<value name="TRI_ALPHA_COMPARE_GE">0x00000700</value>
		<value name="TRI_ALPHA_COMPARE_ALWAYS">0x00000800</value>
	</bitfield>
</reg>

<reg offset="0x0000f000" name="TRI_FOG_AND_INDEX" group="FIFO" class="NV03">
	<bitfield name="VERTEX_NUMBER" range="0:1"/>
	<bitfield name="VERTEX_FIRE" range="8:9">
		<description>Unclear -- in the utah driver, this is set to 0, 0,
		then 1 in a triangle's vertices, and 0, 0, 1, 2 in a quad's
		vertices.  Lines and points are rendered as quads.
		</description>
	</bitfield>
	<bitfield name="FOG_DENSITY" range="8:31">
		<description>Unsigned 24-bit value of the fog density.  The
		collision with LAST_VERT is confusing.
		</description>
	</bitfield>
</reg>

<reg offset="0x0000f004" name="TRI_COLOR" group="FIFO" class="NV03">
	<bitfield name="TRI_COLOR_A" range="24:31"/>
	<bitfield name="TRI_COLOR_R" range="16:23"/>
	<bitfield name="TRI_COLOR_G" range="8:15"/>
	<bitfield name="TRI_COLOR_B" range="0:7"/>
</reg>

<reg offset="0x0000f008" name="TRI_X" group="FIFO" class="NV03"/>

<reg offset="0x0000f00c" name="TRI_Y" group="FIFO" class="NV03"/>

<reg offset="0x0000f010" name="TRI_Z" group="FIFO" class="NV03"/>

<reg offset="0x0000f014" name="TRI_EYE_M" group="FIFO" class="NV03">
	<description>Float value equal to 1/w</description>
</reg>

<reg offset="0x0000f018" name="TRI_S" group="FIFO" class="NV03"/>

<reg offset="0x0000f01c" name="TRI_T" group="FIFO" class="NV03"/>

<reg offset="0x0000e300" name="TRI_COLOR_KEY" group="FIFO" class="NV05"/>

<reg offset="0x0000e304" name="TRI_TEXTURE_OFFSET" group="FIFO" class="NV05"/>

<reg offset="0x0000e308" name="TRI_TEXTURE_FORMAT" group="FIFO" class="NV05">
	<bitfield name="TRI_FORMAT_UNKNOWN" range="0:7">
		<value name="TRI_FORMAT_UNKNOWN_ALWAYS">0x000000A1
		<description>This register always has this set, in the utah
		driver.</description>
		</value>
	</bitfield>
	<bitfield name="TRI_WRAP_S" range="8:11">
		<value name="TRI_FORMAT_ARGB4444">0x00000400</value>
		<value name="TRI_FORMAT_RGB565">0x00000500</value>
	</bitfield>
	<bitfield name="TRI_MIPMAP_MAX_LEVEL" range="12:15"/>
	<bitfield name="TRI_TEXTURE_WIDTH" range="16:19">
		<description>log2 of the texture width.</description>
	</bitfield>
	<bitfield name="TRI_TEXTURE_HEIGHT" range="20:23">
		<description>log2 of the texture height.</description>
	</bitfield>
	<bitfield name="TRI_WRAP_S" range="24:27">
		<value name="TRI_WRAP_S_WRAP">0x01000000</value>
		<value name="TRI_WRAP_S_CLAMP">0x03000000</value>
	</bitfield>
	<bitfield name="TRI_WRAP_T" range="28:31">
		<value name="TRI_WRAP_S_WRAP">0x10000000</value>
		<value name="TRI_WRAP_S_CLAMP">0x30000000</value>
	</bitfield>
</reg>

<reg offset="0x0000e30c" name="TRI_TEXTURE_FILTER" group="FIFO" class="NV05">
	<bitfield name="TRI_MIN_FILTER" range="28:29">
		<value name="TRI_MIN_FILTER_NEAREST">0x10000000</value>
		<value name="TRI_MIN_FILTER_LINEAR">0x20000000</value>
	</bitfield>
	<bitfield name="TRI_MAG_FILTER" range="24:27">
		<value name="TRI_MAG_FILTER_NEAREST">0x01000000</value>
		<value name="TRI_MAG_FILTER_LINEAR">0x02000000</value>
		<value name="TRI_MAG_FILTER_NEAREST_MIPMAP_NEAREST">0x03000000</value>
		<value name="TRI_MAG_FILTER_NEAREST_MIPMAP_LINEAR">0x04000000</value>
		<value name="TRI_MAG_FILTER_LINEAR_MIPMAP_NEAREST">0x05000000</value>
		<value name="TRI_MAG_FILTER_LINEAR_MIPMAP_LINEAR">0x06000000</value>
	</bitfield>
</reg>

<reg offset="0x0000e310" name="TRI_BLEND" group="FIFO" class="NV05">
	<bitfield name="UNKNOWN" range="0:31">
		<value name="UNKNOWN_BLEND">0x00000120</value>
		<description>It's set to this in utah-glx.  0x4 is added when
		texturing is disabled.</description>
	</bitfield>
	<bitfield name="SHADE" range="6:7">
		<value name="SHADE_FLAT">0x00000040</value>
		<value name="SHADE_GOURAUD">0x00000080</value>
	</bitfield>
	<bitfield name="FOG_ENABLE" range="16:16"/>
	<bitfield name="BLEND_ENABLE" range="20:20"/>
	<bitfield name="SRCBLEND" range="24:27">
		<value name="SRCBLEND_ZERO">0x00100000</value>
		<value name="SRCBLEND_ONE">0x00200000</value>
		<value name="SRCBLEND_SRC_COLOR">0x00300000</value>
		<value name="SRCBLEND_INV_SRC_COLOR">0x00400000</value>
		<value name="SRCBLEND_SRC_ALPHA">0x00500000</value>
		<value name="SRCBLEND_INV_SRC_ALPHA">0x00600000</value>
		<value name="SRCBLEND_DST_ALPHA">0x00700000</value>
		<value name="SRCBLEND_INV_DST_ALPHA">0x00800000</value>
		<value name="SRCBLEND_DST_COLOR">0x00900000</value>
		<value name="SRCBLEND_INV_DST_COLOR">0x00a00000</value>
		<value name="SRCBLEND_SRC_ALPHA_SATURATE">0x00b00000</value>
	</bitfield>
	<bitfield name="DSTBLEND" range="28:31">
		<value name="DSTBLEND_ZERO">0x01000000</value>
		<value name="DSTBLEND_ONE">0x02000000</value>
		<value name="DSTBLEND_SRC_COLOR">0x03000000</value>
		<value name="DSTBLEND_INV_SRC_COLOR">0x04000000</value>
		<value name="DSTBLEND_SRC_ALPHA">0x05000000</value>
		<value name="DSTBLEND_INV_SRC_ALPHA">0x06000000</value>
		<value name="DSTBLEND_DST_ALPHA">0x07000000</value>
		<value name="DSTBLEND_INV_DST_ALPHA">0x08000000</value>
		<value name="DSTBLEND_DST_COLOR">0x09000000</value>
		<value name="DSTBLEND_INV_DST_COLOR">0x0a000000</value>
	</bitfield>
	<description>The blend fields aren't necessarily correct.  They were
	taken from utah, which just uses math, rather than a switch statement,
	to compute the field values.  When disabled, it sets to SRCBLEND_ONE/
	DSTBLEND_ZERO.
	</description>
</reg>

<reg offset="0x0000e314" name="TRI_CONTROL" group="FIFO" class="NV05">
	<bitfield name="ALPHA_TEST_ENABLE" range="11:11"/>
	<bitfield name="DEPTH_TEST_ENABLE" range="14:14"/>
	<bitfield name="ZFUNC" range="16:19">
		<value name="ZFUNC_NEVER">0x00010000</value>
		<value name="ZFUNC_LT">0x00020000</value>
		<value name="ZFUNC_EQ">0x00030000</value>
		<value name="ZFUNC_LE">0x00040000</value>
		<value name="ZFUNC_GT">0x00050000</value>
		<value name="ZFUNC_NE">0x00060000</value>
		<value name="ZFUNC_GE">0x00070000</value>
		<value name="ZFUNC_ALWAYS">0x00080000</value>
	</bitfield>
	<bitfield name="DEPTH_MASK_ENABLE" range="20:20"/>
	<bitfield name="DITHER_ENABLE" range="22:22"/>
</reg>

<reg offset="0x0000e318" name="TRI_FOG_COLOR" group="FIFO" class="NV05">
	<bitfield name="TRI_COLOR_A" range="24:31"/>
	<bitfield name="TRI_COLOR_R" range="16:23"/>
	<bitfield name="TRI_COLOR_G" range="8:15"/>
	<bitfield name="TRI_COLOR_B" range="0:7"/>
</reg>

<regseries offset="0x0000e400" name="TRI_VERTEX_#N_#X" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
</regseries>

<regseries offset="0x0000e404" name="TRI_VERTEX_#N_#Y" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
</regseries>

<regseries offset="0x0000e408" name="TRI_VERTEX_#N_#Z" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
</regseries>

<regseries offset="0x0000e40c" name="TRI_VERTEX_#N_#EYE_M" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
	<description>Float value equal to 1/w</description>
</regseries>

<regseries offset="0x0000e410" name="TRI_VERTEX_#N_#COLOR" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
	<bitfield name="TRI_COLOR_A" range="24:31"/>
	<bitfield name="TRI_COLOR_R" range="16:23"/>
	<bitfield name="TRI_COLOR_G" range="8:15"/>
	<bitfield name="TRI_COLOR_B" range="0:7"/>
</regseries>

<regseries offset="0x0000e414" name="TRI_VERTEX_#N_#SPECULAR" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
</regseries>

<regseries offset="0x0000e418" name="TRI_VERTEX_#N_#S" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
</regseries>

<regseries offset="0x0000e41c" name="TRI_VERTEX_#N_#T" group="FIFO">
	<count name="TRI_VERTEX_COUNT">16</count>
	<skip>0x00000020</skip>
</regseries>

<reg offset="0x0000e600" name="TRI_DRAW_TRIANGLE" group="FIFO" class="NV05">
	<bitfield name="TRI_0" range="0:3"/>
	<bitfield name="TRI_1" range="4:7"/>
	<bitfield name="TRI_2" range="8:11"/>
	<description>This field triggers the drawing of a triangle using the
	specified vertices from the set of vertex registers that have been
	previously set up.
	</description>
</reg>

</regset>
